Hiroshima University Syllabus

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Japanese
Academic Year 2024Year School/Graduate School School of Engineering
Lecture Code K6218020 Subject Classification Specialized Education
Subject Name CMOS論理回路設計
Subject Name
(Katakana)
シイモスロンリカイロセツケイ
Subject Name in
English
CMOS Logic Circuit Design
Instructor KOIDE TETSUSHI,SASAKI MAMORU
Instructor
(Katakana)
コイデ テツシ,ササキ マモル
Campus Higashi-Hiroshima Semester/Term 3rd-Year,  First Semester,  2Term
Days, Periods, and Classrooms (2T) Tues3-4,Fri9-10:ENG 218
Lesson Style Lecture Lesson Style
(More Details)
 
 
Credits 2.0 Class Hours/Week   Language of Instruction B : Japanese/English
Course Level 4 : Undergraduate Advanced
Course Area(Area) 25 : Science and Technology
Course Area(Discipline) 12 : Electronics
Eligible Students 3rd year students or higher
Keywords CMOS, logic circuit, LSI, layout, dynamic circuit, memory circuit, timing, LSI-test, AI 
Special Subject for Teacher Education   Special Subject  
Class Status
within Educational
Program
(Applicable only to targeted subjects for undergraduate students)
Necessary for obtaining the ability to solve the essential and basic problems in the field of integrated circuits.
In this course, students will learn more and develop further understanding about specialized technology using what the students have learned in the fundamental subjects. 
Criterion referenced
Evaluation
(Applicable only to targeted subjects for undergraduate students)
Program of Electronic Devices and Systems
(Abilities and Skills)
・Ability to apply basic concepts, knowledge, and methods of electronics engineering to concrete/technical problems. 
Class Objectives
/Class Outline
This course teaches the methods of CMOS integrated circuit design in greater detail to students who have already learned the basics of integrated circuits. 
Class Schedule 1st lecture: Introduction and Motivation
2nd lecture: Short Repetition of Integrated-Circuit Basics
3rd lecture: Static and Dynamic CMOS Design
4th lecture: Special-Purpose Digital Circuits
5th lecture: CMOS Layout
6th lecture: Combinational and Sequential CMOS Circuits
7th lecture: Logic Design for Speed (Logical Effort)
8th lecture: Repetition of Basic CMOS-Design Methods, Intermediate Examination
9th lecture: Arithmetic Modules for Addition, Subtraction and Data Shifting
10th lecture: Arithmetic Modules for Multiplication and Division
11th lecture: Memories with Address or Content-Based Access
12th lecture: Multi-Ported Memories and Nearest Match-Search Memories
13th lecture: Interconnects
14th lecture: Clock and Timing
15th lecture: Design for Testability

Concerning examination and tests:
An intermediate examination, a final examination and short tests on each lecture day will be carried out.


 
Text/Reference
Books,etc.
Sub-text book: (1) and (2)  are Japanese sub-textbooks, which will be sold at Hiroshima University Co-op shop.
(1) 集積回路設計 (電子情報通信レクチャーシリーズ):浅田 邦博:コロナ社:ISBN:4-3390-1847-3
(2) ビジュアルに学ぶディジタル回路設計:築山 修治,他:コロナ社:ISBN:4-3390-0811-7

Reference books: [1], [2], [3], and [4] are Japanese textbooks.
[1] 集積回路工学: 吉本 雅彦: オーム社: ISBN 4-2742-1427-3 (Japanese)
[2] FPGA時代に学ぶ 集積回路のしくみ: 宇佐美 公良: コロナ社: ISBN 4-3390-0924-5 (Japanese)
[3] ナノCMOS集積回路: 榎本 忠儀: ISBN 4-5630-6776-8 (Japanese)
[4] ウェスト&ハリス CMOS VLSI 回路設計 基礎編: 宇佐美 公良, 池田 誠, 小林 和淑: ISBN 4-6210-8721-5 (Japanese)
[5] CMOS VLSI Design: A Circuits and Systems Perspective; Neil Weste, David Harris: ISBN 0-3215-4774-8
[6] CMOS Circuit Design, Layout, and Simulation: R. J. Baker, H. W. Li and D. E. Boyce: ISBN 0-7803-3416-7
[7] Principles of CMOS VLSI Design A System Perspective: N. H. E. Weste, K. Eshraghian: ISBN 0-201-53376-6
[8] Digital Integrated Circuits - A Design Perspective: J. M. Rabaey, A. Chandrakasan, B. Nikolic: ISBN 0-13-120764-4 
PC or AV used in
Class,etc.
 
(More Details) Lecture material: Printed lecture notes
Used media: Projector, PC and Internet (for publication of lecture material)
Your Laptop Computer as a Requisite Tool 
Learning techniques to be incorporated  
Suggestions on
Preparation and
Review
1st and 2nd time:
Short review the contents of the lectures "Basics of integrated circuits" and "Design of logic systems" (4th semester).

3rd to 7th time:
Study and understand the material, which will be published on the Teams or with Bb9 a few days before each lecture.
 
8th time:
Review the contents of the lectures 1 to 7 and prepare for the midterm examination. 

9th to 15th time:
Study and understand the material, which will be published on the Teams  or with Bb9 a few days before each lecture.

16th time: 
Review the contents of all lectures 1 to 15 and prepare for the final examination. 
Requirements Completion of the 4th semester course on "integrated circuit fundamentals" and the 3rd semester course on "logic circuit design" is desirable.
Course languages and will be  Japanese and English. 
Grading Method Final examination (about 40%), intermediate examination (about 40%), and short tests and reports after each lecture (about 20%). 
Practical Experience  
Summary of Practical Experience and Class Contents based on it  
Message Please buy and refer to the subtext (1) 集積回路設計 (電子情報通信レクチャーシリーズ):浅田 邦博:コロナ社:ISBN:4-3390-1847-3 ((1) will be available at the co-op shop) due to the online lecture.
Office hours will be fixed on the first day of the course.
These office hours should be actively used by the students to clarify any arising questions.
Please bring your Laptop Computer as a Requisite Tool. 
Other http://www.RNBS.hiroshima-u.ac.jp/
https://researchmap.jp/tetsushi-koide
https://research-er.jp/researchers/view/164117 
Please fill in the class improvement questionnaire which is carried out on all classes.
Instructors will reflect on your feedback and utilize the information for improving their teaching. 
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