WSP06500 Advanced Wireline Interface Technologies

Hiroshima University Syllabus

Japanese

Academic Year 2026Year School/Graduate School Graduate School of Advanced Science and Engineering (Master's Course) Division of Advanced Science and Engineering Quantum Matter Program

Lecture Code WSP06500 Subject Classification Specialized Education

Subject Name 有線インターフェース特論

Subject Name
（Katakana）ユウセンインターフェーストクロン

Subject Name in
English Advanced Wireline Interface Technologies

Instructor KUBOKI TAKESHI

Instructor
(Katakana) クボキ　タケシ

Campus Higashi-Hiroshima Semester/Term 1st-Year, Second Semester, 4Term

Days, Periods, and Classrooms (4T) Weds1-4：AdSM 405N

Lesson Style Lecture Lesson Style
(More Details) Face-to-face, Online (simultaneous interactive), Online (on-demand)

Credits 2.0 Class Hours/Week 4 Language of Instruction B : Japanese／English

Course Level 6 : Graduate Advanced

Course Area（Area） 25 : Science and Technology

Course Area（Discipline） 12 : Electronics

Eligible Students

Keywords

Special Subject for Teacher Education 　 Special Subject 　

Class Status
within Educational
Program
(Applicable only to targeted subjects for undergraduate students)
Criterion referenced
Evaluation
(Applicable only to targeted subjects for undergraduate students)

Class Objectives
/Class Outline Objectives

By the end of this course, students will be able to:

1. Explain the role of wireline interface technologies and their importance in overall systems.
2. Understand the operating principles of the basic building blocks of high-speed wireline communication, including transmitters, receivers, and clock circuits.
3. Organize and explain the key design challenges of CMOS-based wireline interfaces, such as bandwidth, power consumption, jitter, and noise tolerance.
4. Explain the basic structures of optical communication systems and optical devices, as well as the characteristics of circuit-device co-design in electro-optic integration.
5. Compare implementations of electrical wireline communication and optical communication, and discuss application scenarios such as edge AI, data centers, and inter-chiplet communication.

Overview

This course covers both electrical wireline communication and optical communication, from the fundamentals of physical-layer interface circuits to advanced applications. Students will learn the basics of electrical wireline communication through topics such as high-speed SerDes, clocking circuits, and equalization techniques. They will also study recent trends in electro-optic integration through optical devices and optical interface circuits. In addition, future interface technologies will be discussed using examples such as optical I/O for chiplet interconnects and co-packaging technologies.

Class Schedule Lecture 1: Introduction — The role of wireline interface technologies and their application areas (edge AI, data centers, HPC, etc.)
Lecture 2: Fundamentals of wireline communication channels — transmission line characteristics, loss, noise, and channel models
Lecture 3: Basic building blocks of high-speed wireline communication circuits (transmitters, receivers, and clock circuits)
Lecture 4: Equalization techniques (FFE, DFE, CTLE) and their circuit implementations
Lecture 5: Clock generation and distribution techniques (PLL, CDR, jitter characteristics)
Lecture 6: Approaches to low-power design and recent trends in wireline communication technologies (PAM4, 112-Gbps-class circuits, etc.)
Lecture 7: System applications of wireline communication interfaces (data centers, chip-to-chip communication, on-chip buses in SoCs)
Lecture 8: Fundamentals of optical communication — characteristics of optical transmission and comparison with electrical communication
Lecture 9: Fundamentals of optical devices (lasers, modulators, photodetectors)
Lecture 10: Optical interface circuits — drivers, TIAs, and cross-domain design
Lecture 11: Electro-optic integrated interfaces — co-design challenges with CMOS integrated circuits
Lecture 12: Optical I/O for chiplet interconnects and co-packaging technologies (silicon photonics, optical interposers)
Lecture 13: Comparison and integration of wireline and optical communication (bandwidth, power consumption, distance, implementation cost)
Lecture 14: State-of-the-art research examples (co-packaged optics, electro-optic integrated AI chips, next-generation data-center links)
Lecture 15: Summary and future outlook — the future of wireline interfaces (Beyond Moore, quantum and AI applications)

No final examination will be conducted. Evaluation will be based primarily on reports and presentations.

Text/Reference
Books,etc. References
Hideo Nagano, All About High-Speed Video Interfaces: HDMI & DisplayPort, CQ Publishing
Papers from international conferences such as ISSCC, VLSI, OFC, and ECOC
J. F. Buckwalter, Design of High-Speed Wireline Transceivers, Springer
B. Razavi, Design of Integrated Circuits for Optical Communications, Wiley
Recent academic papers and review articles

PC or AV used in
Class,etc. Text, Handouts, Microsoft Teams

(More Details)

Learning techniques to be incorporated Discussions, Paired Reading, Flip Teaching

Suggestions on
Preparation and
Review Students will be asked to read and present recent papers from major international conferences. A solid academic foundation that enables students to read technical papers is therefore important.

Requirements

Grading Method Grades will be determined based on the level of achievement of the course objectives. A score of 60 points or higher out of 100 is required to pass.

Practical Experience Experienced

Summary of Practical Experience and Class Contents based on it The instructor has practical experience in semiconductor integrated circuit design in industry, and this experience will be reflected in the course content.

Message

Other

Please fill in the class improvement questionnaire which is carried out on all classes.
Instructors will reflect on your feedback and utilize the information for improving their teaching.

Academic Year	2026Year	School/Graduate School	Graduate School of Advanced Science and Engineering (Master's Course) Division of Advanced Science and Engineering Quantum Matter Program
Lecture Code	WSP06500	Subject Classification	Specialized Education
Subject Name	有線インターフェース特論
Subject Name （Katakana）	ユウセンインターフェーストクロン
Subject Name in English	Advanced Wireline Interface Technologies
Instructor	KUBOKI TAKESHI
Instructor (Katakana)	クボキ　タケシ
Campus	Higashi-Hiroshima	Semester/Term	1st-Year, Second Semester, 4Term
Days, Periods, and Classrooms	(4T) Weds1-4：AdSM 405N
Lesson Style	Lecture	Lesson Style (More Details)	Face-to-face, Online (simultaneous interactive), Online (on-demand)

Credits	2.0	Class Hours/Week	4	Language of Instruction	B : Japanese／English
Course Level	6 : Graduate Advanced
Course Area（Area）	25 : Science and Technology
Course Area（Discipline）	12 : Electronics
Eligible Students
Keywords
Special Subject for Teacher Education		Special Subject
Class Status within Educational Program (Applicable only to targeted subjects for undergraduate students)
Criterion referenced Evaluation (Applicable only to targeted subjects for undergraduate students)
Class Objectives /Class Outline	Objectives By the end of this course, students will be able to: 1. Explain the role of wireline interface technologies and their importance in overall systems. 2. Understand the operating principles of the basic building blocks of high-speed wireline communication, including transmitters, receivers, and clock circuits. 3. Organize and explain the key design challenges of CMOS-based wireline interfaces, such as bandwidth, power consumption, jitter, and noise tolerance. 4. Explain the basic structures of optical communication systems and optical devices, as well as the characteristics of circuit-device co-design in electro-optic integration. 5. Compare implementations of electrical wireline communication and optical communication, and discuss application scenarios such as edge AI, data centers, and inter-chiplet communication. Overview This course covers both electrical wireline communication and optical communication, from the fundamentals of physical-layer interface circuits to advanced applications. Students will learn the basics of electrical wireline communication through topics such as high-speed SerDes, clocking circuits, and equalization techniques. They will also study recent trends in electro-optic integration through optical devices and optical interface circuits. In addition, future interface technologies will be discussed using examples such as optical I/O for chiplet interconnects and co-packaging technologies.
Class Schedule	Lecture 1: Introduction — The role of wireline interface technologies and their application areas (edge AI, data centers, HPC, etc.) Lecture 2: Fundamentals of wireline communication channels — transmission line characteristics, loss, noise, and channel models Lecture 3: Basic building blocks of high-speed wireline communication circuits (transmitters, receivers, and clock circuits) Lecture 4: Equalization techniques (FFE, DFE, CTLE) and their circuit implementations Lecture 5: Clock generation and distribution techniques (PLL, CDR, jitter characteristics) Lecture 6: Approaches to low-power design and recent trends in wireline communication technologies (PAM4, 112-Gbps-class circuits, etc.) Lecture 7: System applications of wireline communication interfaces (data centers, chip-to-chip communication, on-chip buses in SoCs) Lecture 8: Fundamentals of optical communication — characteristics of optical transmission and comparison with electrical communication Lecture 9: Fundamentals of optical devices (lasers, modulators, photodetectors) Lecture 10: Optical interface circuits — drivers, TIAs, and cross-domain design Lecture 11: Electro-optic integrated interfaces — co-design challenges with CMOS integrated circuits Lecture 12: Optical I/O for chiplet interconnects and co-packaging technologies (silicon photonics, optical interposers) Lecture 13: Comparison and integration of wireline and optical communication (bandwidth, power consumption, distance, implementation cost) Lecture 14: State-of-the-art research examples (co-packaged optics, electro-optic integrated AI chips, next-generation data-center links) Lecture 15: Summary and future outlook — the future of wireline interfaces (Beyond Moore, quantum and AI applications) No final examination will be conducted. Evaluation will be based primarily on reports and presentations.
Text/Reference Books,etc.	References Hideo Nagano, All About High-Speed Video Interfaces: HDMI & DisplayPort, CQ Publishing Papers from international conferences such as ISSCC, VLSI, OFC, and ECOC J. F. Buckwalter, Design of High-Speed Wireline Transceivers, Springer B. Razavi, Design of Integrated Circuits for Optical Communications, Wiley Recent academic papers and review articles
PC or AV used in Class,etc.	Text, Handouts, Microsoft Teams
(More Details)
Learning techniques to be incorporated	Discussions, Paired Reading, Flip Teaching
Suggestions on Preparation and Review	Students will be asked to read and present recent papers from major international conferences. A solid academic foundation that enables students to read technical papers is therefore important.
Requirements
Grading Method	Grades will be determined based on the level of achievement of the course objectives. A score of 60 points or higher out of 100 is required to pass.
Practical Experience	Experienced
Summary of Practical Experience and Class Contents based on it	The instructor has practical experience in semiconductor integrated circuit design in industry, and this experience will be reflected in the course content.
Message
Other
Please fill in the class improvement questionnaire which is carried out on all classes. Instructors will reflect on your feedback and utilize the information for improving their teaching.

Back to syllabus main page