Hiroshima University Syllabus

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Japanese
Academic Year 2021Year School/Graduate School Graduate School of Advanced Science and Engineering (Master's Course) Division of Advanced Science and Engineering Informatics and Data Science Program
Lecture Code WSN20201 Subject Classification Specialized Education
Subject Name Embedded System
Subject Name
(Katakana)
エンベディド システム
Subject Name in
English
Embedded System
Instructor NAKANO KOUJI,TAKAFUJI DAISUKE,ITOU YASUAKI
Instructor
(Katakana)
ナカノ コウジ,タカフジ ダイスケ,イトウ ヤスアキ
Campus Higashi-Hiroshima Semester/Term 1st-Year,  First Semester,  1Term
Days, Periods, and Classrooms (1T) Fri5-10:ENG 110
Lesson Style Lecture Lesson Style
(More Details)
 
This course includes experiment using a CPU on an FPGA board. 
Credits 2.0 Class Hours/Week   Language on Instruction E : English
Course Level 5 : Graduate Basic
Course Area(Area) 25 : Science and Technology
Course Area(Discipline) 02 : Information Science
Eligible Students
Keywords  
Special Subject for Teacher Education   Special Subject  
Class Status
within Educational
Program
 
Criterion referenced
Evaluation
 
Class Objectives
/Class Outline
The main purpose of this course is to understand the design of CPU.  
Class Schedule [1] Pre-exam
[2,3,4] Verilog HDL and design of logic gates
[5,6,7] Combinational circuits
[8,9,10,11] Sequential logic
[12,13,14,15] CPU design 
Text/Reference
Books,etc.
Documents are provided. 
PC or AV used in
Class,etc.
 
(More Details) Nexys 4 FPGA board 
Learning techniques to be incorporated  
Suggestions on
Preparation and
Review
Students must submit reports. 
Requirements  
Grading Method Report for each class will be evaluated 
Practical Experience  
Summary of Practical Experience and Class Contents based on it  
Message  
Other   
Please fill in the class improvement questionnaire which is carried out on all classes.
Instructors will reflect on your feedback and utilize the information for improving their teaching. 
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