Hiroshima University Syllabus

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Japanese
Academic Year 2021Year School/Graduate School School of Informatics and Data Science
Lecture Code KA124001 Subject Classification Specialized Education
Subject Name 計算機構成論
Subject Name
(Katakana)
ケイサンキコウセイロン
Subject Name in
English
Computer Architecture
Instructor NAKANO KOUJI
Instructor
(Katakana)
ナカノ コウジ
Campus Higashi-Hiroshima Semester/Term 2nd-Year,  Second Semester,  4Term
Days, Periods, and Classrooms (4T) Fri1-4:ENG 218
Lesson Style Lecture Lesson Style
(More Details)
 
on-line videos and reports 
Credits 2.0 Class Hours/Week   Language on Instruction B : Japanese/English
Course Level 3 : Undergraduate High-Intermediate
Course Area(Area) 25 : Science and Technology
Course Area(Discipline) 02 : Information Science
Eligible Students
Keywords  
Special Subject for Teacher Education   Special Subject  
Class Status
within Educational
Program
 
Criterion referenced
Evaluation
Program of Electronic Devices and Systems
(Abilities and Skills)
・Ability to apply basic concepts, knowledge, and methods of electronics engineering to concrete/technical problems.

Informatics and Data Science Program
(Abilities and Skills)
・I3. Knowledge related to hardware and software, and the programming skills required for efficiently processing data.
 
Class Objectives
/Class Outline
Learn basics and design of processor architectures and techniques to accelerate the comptuation 
Class Schedule lesson1: Guidance
lesson2,3: Introduction to Verilog HDL: module, assign statement, test bench, simulation.
lesson4,5: Foundations of Verilog HDL: Instantiation, numeric representation, always statement, circuits with variable length bits.
lesson6,7: Digital circuit design using Verilog HDL: selectors, decoders, ALU.
lesson8,9: Digital circuit design using Verilog HDL: Flipflops, complete synchronous sequential circuits, state machine, stack.
lesson10,11: Digital circuit design using Verilog HDL: operation stack, memory circuit, instruction fetch circuit.
lesson12,13: TinyCPU architecture, design of TinyCPU using Verilog HDL.
lesson14,15: Assembly language programming for TinyCPU, assembler, compiler.
lesson16: Final exam. 
Text/Reference
Books,etc.
Online videos and PDF materials 
PC or AV used in
Class,etc.
 
(More Details) Online videos and PDF materials 
Learning techniques to be incorporated  
Suggestions on
Preparation and
Review
Homework assignments and/or exercises are given 
Requirements  
Grading Method reports and final exams are combined 
Practical Experience  
Summary of Practical Experience and Class Contents based on it  
Message  
Other   
Please fill in the class improvement questionnaire which is carried out on all classes.
Instructors will reflect on your feedback and utilize the information for improving their teaching. 
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